Circuit boards that carry integrated electronic circuits as well as discrete electronic components are well known. A circuit board substrate is prepared with predetermined conductor paths and pads for receiving the leads of electronic components such as integrated circuit chips, resistors or capacitors. During the circuit board fabrication process, solder paste bricks are placed onto the board substrate at appropriate positions. The solder paste is usually applied by placing a screen onto the substrate, applying solder paste through the screen openings, wiping the excess solder paste from the screen surface, and removing the screen from the substrate. The circuit board electronic components are then positioned onto the substrate, preferably with a pick and place machine, with the leads of the electronic components placed on their respective, appropriate solder paste bricks. The circuit board is passed through an oven after all of the components are positioned on the substrate, to melt the solder paste and make an electrical and mechanical connection between the components and the substrate.
The size of the solder paste bricks, and the accuracy with which they must be placed on the substrate, have become increasingly smaller and tighter with the increased emphasis on miniaturization in the electronics industry. Solder paste brick heights can be as small as two hundred microns, and the height of the solder paste brick must often be measured to within one percent of the designed height and size. Too little solder paste can result in the failure to provide an electrical connection between the lead of an electronic component and the pad of the circuit board substrate. Too much paste can result in bridging and short circuiting between the leads of a component.
A single circuit board can cost thousands and even tens of thousands of dollars to manufacture. Testing of a circuit board after the fabrication process is complete can detect errors in solder paste placement and component lead connection, but often the only remedy for a faulty board is rejection of the board. It is accordingly imperative that a circuit board be inspected during the fabrication process, so that improper solder paste placement can be detected prior to the placement of electronic components onto the substrate.
U.S. Pat. No. 5,101,442 granted to Amir for Three Dimensional Imaging Technique Using Sharp Gradient of Illumination discloses a method and apparatus for obtaining a three dimensional image of a substrate in accordance with the gradient of the intensity of the structured light reflected from the substrate surface. A first stripe of light is projected onto the surface of a target object and the object is scanned through the light stripe while the intensity of the light reflected from the surface is measured by a detector. The scanning process is repeated with a second stripe of light, but with the second stripe being offset from the position of the first light stripe.
The reflectance intensities of the beams of light used in the apparatus disclosed by Amir are assumed to be linear such that the distance of a spot on the surface from the longitudinal center of the light beams is linearly related to the intensity of light reflected from that spot. Because the beams of light strike the surface of the target object at an angle, the lateral position of a spot on the surface relative to the beam center is a function of the height of the spot, and the intensity of the light received by the detector from the spot will differ as a function of height.
The apparatus disclosed by Amir requires two scans from two offset beams of light, because the intensity of the light received by the detector will be a product of both the intensity of the illumination and the reflectance of the surface of the target. The surface reflectance of a circuit board varies greatly between the areas of bare substrate and solder paste pads, and accordingly cannot be assumed to be a constant. It is the variations in illumination, not surface reflectance, that indicate height, and two scans are required to gather enough data to solve for the two unknowns.
Scanning a circuit board substrate to obtain a three dimensional image takes time, and scanning the board twice takes double that time. Moreover, taking two scans of a target object assumes no movement of the object between the scans, requires tight calibration of the offset light sources, and accordingly makes the process vulnerable to vibration. An apparatus and method that obtained three dimensional images of target objects without the requirement for multiple scans, and that could distinguish dimensions of as small as two hundred microns within one percent accuracy, would provide decided advantages.